Class Learning Objectives

CS/SE 4340 Computer Architecture

Ability to convert fractional data between decimal and 2's complement notation.
Ability to perform addition, subtraction, multiplication by 2, and division by 2 in 2's complement fixed point fractions' notation.
Ability to analyze and design gate-level combinational logic circuits.
Ability to analyze, design, and utilize combinational components such as adders, multiplexers, and decoders.
Ability to analyze and design simple synchronous sequential circuits.
Ability to design shift registers.
Ability to design gate-level RAM and ROM chips, utilize ROM in combinational design, and interconnect memory circuits to construct larger memories.
Ability to design an Arithmetic-Logic-Unit and a data path, given specific register transfer requirements and using gates and components.
Ability to design macros (sequences of micro-operations) for a given set of machine instructions on a simple computer, and for a given data path.
Understand the use of a variety of addressing modes.
Understand the use of priority interrupt mechanism.